Function mechanism and characteristics of 2407 core components of 2000 series DSP devices

We have studied DSP2407 to 28 12 for a long time this semester, especially 2407. But what is DSP? Let me introduce you first. Digital signal processing (DSP) is a new discipline involving many subjects, and it has been widely used in many fields. Since 1960s, with the rapid development of computer and information technology, digital signal processing technology came into being and developed rapidly. Digital signal processing is a method to process real signals represented by digital sequences by using mathematical skills to perform conversion or extract information. In the past twenty years, digital signal processing has been widely used in communication and other fields. Semiconductor manufacturers such as Texas Instruments and Freescale are strong in this field.

Now, let's learn about the development of DSP. The DSP industry has gone through three stages in about 40 years. In the first stage, DSP stands for digital signal processing, which is popular as a new theoretical system. With the maturity of this era, DSP has entered the second development stage. At this stage, DSP stands for digital signal processor. These DSP devices have greatly changed many aspects of our lives. Then the third stage was born, which is an enabling period. We will see that both DSP theory and DSP architecture are embedded in SoC products. In the first stage, DSP means digital signal processing. The second stage began in 1980s, when DSP moved from concept to product. The excellent performance and characteristics of TMS320 10 have attracted much attention from the industry. Mr. Jin Fang mentioned in an article that the emerging DSP business also bears huge risks, and where to expand it is a matter of life and death. When designers strive to reduce the cost per MIPS of DSP processor to below $65,438+00, which is suitable for commercial use, DSP has been continuously successful in military, industrial and commercial applications. By 199 1 year, TI introduced a DSP chip with a price comparable to that of 16-bit microprocessor, which achieved a batch unit price of less than $5 for the first time, but its performance was 0/0 times that of/kloc-0. In the 1990s, many companies entered the field of DSP and competed with TI in the market. TI is the first to provide a customizable DSP——cDSP. The design of cDSP based on kernel DSP can make DSP have higher system integration and greatly speed up the time to market. At the same time, TI aims at the fastest growing field of DSP electronic market. By the mid-1990s, this programmable DSP device has been widely used in data communication, mass storage, voice processing, automotive electronics, consumer audio and video products, and the most brilliant achievement is its success in digital cellular phones. At this time, DSP business has also become the largest business of TI. At present, the price of DSP per MIPS has dropped to the range of 10 cents to 1 USD. 2 1 century, the development of DSP entered the third stage, and the market competition became more intense. TI adjusts the overall planning of DSP development strategy in time to deepen the industrialization process with comprehensive product planning, perfect solutions and brand-new development concepts. The premise of this progress is that the price target of DSP per MIPS has been set at a few cents or even less.

Overview of DSP2407 and DSP28 12

( 1)2407

2407 is part of our study and experiment. 2407 development board is divided into Ti2000-011dsp2407 enhanced, DSP2407+CPLD development board and SHX-DSP2407A development board. DSP2407+CPLD development board suite is a learning and development platform based on TMS320LF2407A+EPM240, which gives full play to the flexibility and powerful functions of DSP2407 and ALTERA MAX II.

First of all, I learned from the textbook that the hardware of CUP includes accumulator, auxiliary register operator, auxiliary registers 0~7, carry, central arithmetic logic unit, dual-port RAM, data memory page pointer, global memory configuration register, interrupt mask register, interrupt flag register, interrupt trap, input and output data scaling shifter, multiplier, micro-stack, multiplexer, program address register, program counter and program controller.

The input scaling shifter can adjust the 16 bit data from the program memory or data memory to 32 bits and send it to the central arithmetic and logic unit, and it will not occupy the clock overhead, which is very useful in the setting of arithmetic scaling and logic operation of mask positioning.

The central arithmetic logic part is mainly composed of three parts: CALU, ACC and output scaling shifter. The central arithmetic logic unit is the part that realizes arithmetic and logical operation functions, and can perform Boolean operation, so that the controller has bit operation function. When the operation is completed in CALU, the result is sent to the accumulator, and some other operations are performed in the accumulator. In practical application, ACC is used quite frequently.

There are two status registers ST0 and ST 1 in 2407, which contain various status and control bits and control the working status of many systems, which is particularly important in applications.

Then the digital I/O module.

There are as many as 4 1 universal and bidirectional digital I/O pins in 2407, many of which are multiplexed pins to realize universal I/O and basic functions. The functions of all dedicated I/O and multiplexed I/O pins can be set through 9 16-bit control registers. Can be divided into two categories:

I/O port multiplexing control register, which is used to control whether I/O port is selected as basic function or general I/O pin function.

Data and direction control registers, which can control the data direction of data and bidirectional I/O pins when I/O ports are used as general I/O pins. These registers are directly connected to bidirectional I/O pins.

I/O module is combined with many modules in practical application, such as the combination with LED lights, and the combination of keyboard and LED to realize the application of lighting LED with keyboard. In a word, I/O module is indispensable in the design and application of DSP and plays an important role in the interaction with other modules.

There is an important module here-the event manager module.

2407 includes two event manager modules EVA and EVB, each module consists of a general timer (GP), a comparison unit, a capture unit and an orthogonal coded pulse circuit. These components make the event manager have a very important application in motor control.

Each event management module has two general programmable timers, and each timer includes a 16-bit timer increment/decrement counter, a 16-bit timer comparison register, a 16-bit timer period register and a 16-bit timer control register, as well as an optional internal or external input clock, a programmable prescaler and a programmable frequency divider. These devices can make the timer perform four counting modes: stop/hold, continuous up/down counting, directional up/down counting, continuous up/down counting and various operations, such as comparison operation and PWM output, which can produce a variety of symmetrical or asymmetrical waveform outputs, which brings great convenience and flexible operation space for motor control.

(2)28 12

DSP28 12 is a powerful 32-bit fixed-point DSP of TMS320F28 12 and an upgraded version of TMS320LF2407A. Its biggest feature is that its speed is qualitatively improved compared with TMS320LF2407A, from 40M of TMS320F28 12 to 150M. The biggest highlight is that it has EVA, EVB event manager and 12-bit 16 channel AD data acquisition, which is convenient for controlling the motor. Plus a wealth of peripheral interfaces, such as CAN, SCI and so on. , occupies a large share in the field of industrial control.

Features of DSP microprocessor:

DSP (Digital Signal Processor) is a unique microprocessor, which uses digital signals to process a large amount of information. Its working principle is to receive analog signals and convert them into digital signals of 0 or 1. Then modify, delete and enhance the digital signal, and interpret the digital data back to analog data or actual environment format in other system chips. Not only is it programmable, but its real-time running speed can reach tens of millions of complex instruction programs per second, far exceeding the general microprocessor. It is an increasingly important computer chip in the digital electronic world. Its powerful data processing ability and high running speed are the two most commendable features.

DSP microprocessors (chips) usually have the following main features:

(1) One instruction cycle can complete one multiplication and one addition;

(2) The program and data space are separated, and instructions and data can be accessed at the same time;

(3) There is fast RAM in the chip, which can be accessed in two blocks simultaneously through independent data bus;

(4) Hardware supports loop and jump with low or no overhead;

(5) fast interrupt handling and hardware I/O support;

(6) having a plurality of hardware address generators operating in a single cycle;

(7) Multiple operations can be executed in parallel;

(8) Support pipeline operation, so that operations such as fetching, decoding and execution can overlap.

Of course, compared with general microprocessor, other general functions of DSP microprocessor (chip) are relatively weak.

Advantages of DSP:

Insensitive to the tolerance of component values, and less influenced by external factors such as temperature and environment;

Easy to realize integration; very large-scale integration (VLSI)

Time-sharing multiplexing, * * * enjoy the processor;

It is convenient to adjust the coefficient of the processor to realize adaptive filtering;

It can realize the functions that analog processing can not: linear phase, multi-sampling rate processing, cascade, easy storage and so on.

Can be used for extremely low frequency signals.

Disadvantages of DSP:

Need analog-to-digital conversion;

Limited by the sampling frequency, the processing frequency range is limited;

Digital system is composed of active devices that consume power, which is not as reliable as passive devices.

But its advantages far outweigh its disadvantages.

Program fragments commonly used in books

Assembly language source program fragment:

; main program

. text

_c_int0

CALLSYSINIT system initializer

Call PWM _ INIT；; Initialization program for pulse width modulation of EVB module

wait for

Nototherwiseprovided(for) unless otherwise specified.

BWAIT

; System initialization program

SYSINIT:

SETC·INTM

CLRC·SXM

CLRC·OVM

CLRC·CNF； B0 area is configured as data space.

LDP # 0E0H points to the 7000h-7080h area.

SPLK # 8 1 feh，scsr 1； Clock is four times, CLKIN = 6m, CLKOUT = 24m.

SPLK # 0E8H Do not enable WDT.

LDP # 0

SPLK # 0002H, IMR enables interrupt level 2 INT2.

SPLK # 0FFFFH, IFR clears all interrupt flags.

Soak in water to soften

; PWM initialization program of EVB module

PWM_INIT:

LDP # DP _ PF2 points to the 7080h-7 100h area.

LACLMCRC

Or # 007EHIOPE[ 1-6] is configured as the basic function mode: PWM[7- 12].

SACLMCRC

Liberal Democratic Party # DP _ EVB；; Point to the 7500h-7580h area.

SPLK # 0FFFFH, EVBIFRA clears all interrupt flags of EVB.

SPLK # 0666H, ACTRBPWM 12,10,8 are inefficient, and PWM 1 1, 9,7 are efficient.

SPLK # 00H, DBTCONB dead-time control is not enabled.

SPLK # 10H, CMPR4 sets the initial comparison value PWM7: high level accounts for 50/60, and low level accounts for 10/60.

SPLK # 20H, CMPR5 sets the comparison register of PWM9, 10.

SPLK # 30H and CMPR6 set the comparison registers of PWM 1 1 and 12.

SPLK # 60H, T3PR sets the timer 3 period register,

; That is, the PWM cycle is 60 CPU clock cycles.

SPLK # 0A600H, COMCONB enables comparison operation.

SPLK # 0，T3CNT

SPLK # 4 1H，GPTCONBTCOMPOE= 1，T3PIN=0 1

SPLK # 080H, EVBIMRA general timer 3 enabled.

SPLK # 0 174 eh, T3CONTMODE= 10 continuous counting mode, TPS =11the prescaler is 128.

; TENABLE= 1 timer counting enabled, TCLKS=00 internal clock.

; TECMPR= 1 timer3 comparison enabled, SELT3PR=0.

CLRCINTM switch interrupt

Soak in water to soften

; Timer3 interrupt program

gisr 2:； Priority INT2 interrupt filling

; Protect the scene

LDP # 0； Save machine context

SST # 0, st0 _ temp uses automatic addressing, DP-0.

SST # 1，ST 1 _ temp； Save the status record to B2 Dalam.

LDP # 0

SACL background; Save the low 16 bits of ACC.

SACH context+1; Save the high 16 bits of ACC.

Sarar 1, context +2

SARAR2, context +3

SARAR3, context +4

SARAR4, context +5

SARAR5, context +6

LDP # 0E0H

LACCPIVR， 1； Read the peripheral interrupt vector register (PIVR) and shift it to the left by one bit.

Add # PVECTORS plus peripheral interrupt to fill the address.

BACC； Jump to the corresponding interrupt service subroutine.

T3GP _ ISR:； General timer 3 interrupt filling

Liberal Democratic Party #DP_EVB

SPLK # 0，T3CNT

gisr 2 _ RET:； Interrupt return

; Restore the scene

LDP # DP _ EVA

Evifra

LDP # 0

LARAR5, context +6

LARAR4, context +5

LARAR3, context +4

LARAR2, context +3

Larar 1, context +2

lacc context+ 1， 16

Add text

LST # 1, ST 1 _ temporary

LST # 0, st0 _ temporary

CLRCINTM turns on the host interrupt, because once the interrupt is entered, the host interrupt will automatically turn off.

Soak in water to soften

Application of DSP technology

Speech processing: speech coding, speech synthesis, speech recognition, speech enhancement, voice mail, speech storage, etc.

Image/graphics: 2D and 3D graphics processing, image compression and transmission, image recognition, animation, robot vision, multimedia, electronic map, image enhancement, etc.

Military: secure communication, radar processing, sonar processing, navigation, global positioning, frequency hopping radio, search and anti-search, etc.

Instruments: spectrum analysis, function generation, data acquisition, seismic processing, etc.

Automatic control: control, deep space operation, automatic driving, robot control, disk control, etc.

Medical treatment: hearing AIDS, ultrasound equipment, diagnostic tools, patient monitoring, electrocardiogram, etc.

Household appliances: digital audio, digital TV, videophone, music synthesis, tone control, toys and games, etc.

Examples of biomedical signal processing:

CT: Computerized X-ray tomography equipment. (Among them, Hausfield of British EMI Company who invented skull CT won the Nobel Prize. )

Computer x-ray space reconstruction device. Whole body scanning, three-dimensional pattern of heart activity, foreign body in brain tumor and reconstruction of human torso image appear.

Electrocardiogram analysis.

2407 and 28 12 are the two most interesting chips in the dsp2000 series. After using two chips,

The similarities and differences between the two chips are compared.

Have been developed and used for motor control. So there are many similarities in the equipment of peripherals.

Similarities and differences between 2407 and 28 12

1, the same point:

1 time manager, which is used to manage the timer and pwm, as well as the interface of the photoelectric code disk of the motor.

Two channels of ad receive sensor signals.

3 communication interface spi can sci realizes convenient communication.

Both program memory and internal ram have a certain capacity to meet different requirements.

53,3V power supply, highlighting the function of low power consumption and power saving.

6 can expand the program and data space.

7 jtag interface is the same.

8 kernel is the same, which is convenient for program transplantation.

At the same time, the 240x series has the following features:

Using high-performance static CMOS technology, the power supply voltage is reduced to 3.3V, which reduces the power consumption of the controller. The execution speed of 30MIPS is to shorten the instruction cycle to 33ns, thus improving the real-time control ability.

Based on the CPU core of TMS320C2xx DSP, the compatibility between F240x series DSP code and TMS320 series DSP code is ensured.

There is a large program memory, data/program ram, DRAM and SARAM in the chip.

Two event manager modules, including two 16-bit general timers, eight 16-bit pulse width modulation channels, three capture units, on-chip photoelectric encoder interface circuit, and 16-bit channel AD converter. The event manager module is suitable for controlling AC induction motor, brushless DC motor, switched reluctance motor, stepping motor, multi-stage motor and inverter.

There is a large expandable external memory.

With watchdog timer module

Controller area network (CAN)2.0B module, serial communication interface (SCI) module and 16-bit serial peripheral interface (SPI) module.

Clock generator based on PLL, a large number of general I/O pins, five external interrupts (two motor drive protection, reset and two shielding interrupts).

Power management includes three low-power modes, which can independently turn peripheral devices into low-power working modes.

2. Differences:

1 voltage 2407 3. 3V core and IO power supply, and the flash writing voltage is 5V. 28 12 1。 8V or 1.9V kernel and 3. 3VIO power supply, flash write voltage 3.3 V. Power-on sequence, 2407 doesn't matter, 28 12 io is powered on first, and then the core is powered on.

2 Clock 2407 is 40m at most. 28 12 max 150M (core voltage 1.9V) or 135M (core voltage 1.8V).

3 download program mode 2407 programmer download

28 12 programmers download serial spi.

4 cpu 2407 is a 16 bit processor. 28 12 is a 32-processor.

5 program and data space 2407 flash32k ram2. 5K can be extended to 196K. 2812flash16×128k ram16×18k can expand 4M space.

6 time manager 2407 timer 16 bits, an optical code disk interface. 28 12 timer 32-bit has two photoelectric code disk interfaces.

7 ad 2407 10 bit 28 12 12 bit.

8 sci 2407 1 28 without buffer unit12 with buffer unit.

8 cans of 2407 standard cans meet 2. 0B protocol 28 12 enhanced can and standard can conform to 2. 0B

9 mcbsp 2407 is not available in 28 12.

10 language 2407 assembly c 28 12 assembly CC++

1 1 TI support 2407 does not provide more routine support 28 12 provides complete module routine support.

12 programming style 2407 is more inclined to module programming 28 12 programming, and it is more structured.

Protection 13 register. 2407 has no protection for system registers, and 28 12 provides a protection mechanism.

14 In the help file of the development environment, 2407 is better than 28 12, and the register setting and defined help file of 28 12 are basically not explained.

It is precisely because of these similarities and differences that we can easily see that 28 12 has higher processing capacity, richer processing methods and safer system structure than 2407, and it also adds some functions that 2407 does not have.

Therefore, it can be predicted that it has become a trend for 28 12 to replace 2407 in the field of DSP with increasingly strong information processing ability. 2407 is the basic level of 28 12, and 28 12 is more suitable for today's rapid development than 2407. But at this stage, it is necessary to lay a good foundation for learning 2407, so as to better understand and learn 28 12.

Future development of DSP

The core structure of 1. digital signal processor will be further improved. Multi-channel architecture, single instruction multiple data (SIMD) and VLIM will dominate in new high-performance processors, such as ADSP-2 1 16x from analog devices.

2. Integration of 2.DSP and microprocessor;

Microprocessors have low cost, and general-purpose processors that mainly perform intelligent direction control tasks can perform intelligent control tasks well, but the digital signal processing function is poor. The function of DSP is just the opposite. In many applications, it is necessary to have both intelligent control and digital signal processing functions. For example, digital cellular phones need monitoring and sound processing functions. Therefore, combining DSP and microprocessor to realize these two functions with a single chip processor will accelerate the development of personal communicators, smart phones and wireless network products, simplify the design, reduce the volume of PCB and reduce the power consumption and cost of the whole system. For example, Motorola's multi-processor DSP5665x, Massan's FILU-200 with coprocessor function, TI's TMS320C27xx, which expands MCU function into DSP and MCU function, and Hitachi's SH-DSP are all products integrating DSP and MCU. The application of Internet and multimedia will further accelerate this integration process.

3. Integration of 3.DSP and high-end CPU:

Most high-end GPPs, such as Pentium and PowerPC, are superscalar structures of SIMD instruction sets, which are very fast. LSI Logic's LSI40 1Z adopts the branch prediction and dynamic buffering technology of high-end CPU, and its structure is standardized, which is beneficial to programming, without worrying about instruction queuing, and its performance is greatly improved. Intel's involvement in digital signal processors will accelerate this convergence.

4. Integration of 4.DSP and SOC:

SOC (System on Chip) refers to integrating a system on a chip. The system includes DSP and system interface software. For example, Virata Company purchased the license of ZSP400 processor core from LSI Logic Company, and integrated it with USB, 10BASET, Ethernet, UART, GPIO, HDLC and other system software, and applied it to xDSL, which achieved good economic benefits. Therefore, the sales of SOC chips are very good in recent years, from 654.38+600 million chips in 1998 to 345 million chips in 1999. From 65438 to 0999, about 39% of SOC products are used in communication systems. In the next few years, SOC will grow at an average annual rate of 365,438+0%, and will reach 65,438,030,000,000,000 pieces in 2004. Undoubtedly, SOC will become an increasingly dazzling star in the market.

5. Integration of 5.DSP and FPGA:

FPGA is a field programmable gate array device. It is integrated with DSP on one chip, which can realize broadband signal processing and greatly improve the signal processing speed. It is reported that Virtex-II FPGA of Xilinx Company can improve the processing of Fast Fourier Transform (FFT) by more than 30 times. Its chip has a free FPGA for programming. Xilinx Company has developed a high performance kernel called Turbo convolutional encoder and decoder. Designers can integrate one or more Turbo cores in FPGA to support multi-channel and large data flow, and meet the needs of the third generation (3G)WCDMA wireless base stations and mobile phones. At the same time, it greatly saves development time, and it is easy to add functions or improve performance. Therefore, it will be widely used in wireless communication, multimedia and other fields.