Who knows the details of W78e58b?

Because this microcontroller has two ROM spaces, it can switch to different ROM startup programs. Each other can be erased and programmed. The address is as shown in the figure:

Both ROM spaces are executed with address 0X0000, that is, APROM or LDROM must have a corresponding program before ISP can work.

2. Start switching:

a)。 Hardware switching mode:

When powered on, let P43 or P26 and P27 be combined as follows:

b)。 Software switching mode:

1. From APROM to LDROM

case MAIN_JUMP_LDROM:

//All registers must be cleared.

//So only in this way can you enter the LDROM.

/* PSW = 0；

b = 0；

PCON = 0；

SCON = 0；

SBUF = 0；

DPH = 0；

DPL = 0；

P0 = 0XFF

p 1 = 0x ff；

P2 = 0x ff；

P3 = 0x ff；

th 1 = 0；

TL 1 = 0；

*/

CHPENR = 0X87

CHPENR = 0X59///Enable CHPCON in writer_enable.

CHPCON = 0x03// Set flag

TMOD = 0x 0 1； //Timer016-bit mode

TCON = 0； //Stop Timer 0

IP = 0X02

IE = 0X82// Timer0int enables wake-up from//idle mode.

TH0 = 0XFF

TL0 = 0xa0//0xf 0； // 2uS

TR0 = 1； //TR0 = 1 GO

PCON = 0x 0 1； ISP enters idle state.

Break;

2. From LDROM to APROM

CHPENR = 0X87

CHPENR = 0X59

CHPCON = 0X83

Three. EEPROM operation

The following procedure is an example of my LDROM application:

Erase APROM and verify it.

Bit Erase _ROM (Byte Block)

{

Byte index, i;

Bit verify _ ok =1;

TR0 = 0；

TH0 = TIMER _ H _ 15 ms；

TL0 = TIMER _ L _ 15 ms；

timer _ enable = 0； //disable TR0 = 1

SFRCN = 0X22// Erase aprom

TR0 = 1；

//TCON = 0x 10； //Enable timer 0 TR0 = 1

# ifdef ENABLE _ IDLE// test

PCON | = 0x 0 1； //In idle conduction state

#endif

//Wait for the erase to succeed

//The next step is to verify the data (0xff)

TH0 _ temp = TIMER _ H _ 1us 5； //Set the operation to1.5us.

TL0 _ temp = TIMER _ L _ 1us 5；

TH0 = TH0 _ temp

TL0 = TL0 _ temp

SFRCN = 0X00// Read status

SFRAH = 0X00

SFRAL = 0X00

For (index = 0; Index & lt mask; index++)

{

for(I = 0； I & ltBUF _ SIZEi ++)

{

TR0 = 1；

# ifdef ENABLE _ IDLE// test

PCON | = 0x 0 1； //In idle conduction state

#endif

If (SFRFD! = 0XFF)

{

verify _ ok = 0；

Break;

}

other

{

SF ral++；

if(SFRAL == 0)

SF rah++；

}

}

}

If (verification is normal)

Returns1;

other

Returns 0;

}

Program safety bit.

Void pgm_security_byte (bit osc 1)

{

TR0 = 0；

timer _ enable = 0； //disable TR0 = 1

TH0 = TIMER _ H _ 50uS// Set the operation to 50uS.

TL0 = TIMER _ L _ 50uS

sfr cn = 0x 6 1； //Write data

SFRAH = 0xff

SFRAL = 0xff

if(osc 1)

SFRFD = 0xf8

other

SFRFD = 0x78

TR0 = 1；

# ifdef ENABLE _ IDLE// test

PCON | = 0x 0 1； //In idle conduction state

#endif

}

Programming an APOROM, each time 128 bytes.

Bit pgm_ROM_block (byte address _ high, byte address _ low)

{

Byte I, addr_high 1, addr _ low1; //，tg _ data

Bit verify _ ok =1;

addr _ high 1 = address _ high；

addr _ low 1 = address _ low；

TR0 = 0；

timer _ enable = 0； //disable TR0 = 1

TH0 _ temp = TH0 = TIMER _ H _ 50uS// Set the operation to 50uS.

TL0 _ temp = TL0 = TIMER _ L _ 50uS

sfr cn = 0x 2 1； //Write data

for(I = 0； I< 128; i ++)

{

SF rah = addr _ high 1；

SFRAL = addr _ low 1；

SF rfd = ringbuf[I]；

TR0 = 1；

# ifdef ENABLE _ IDLE// test

PCON | = 0x 0 1； //In idle conduction state

#endif

addr _ low 1++；

if(addr_low 1 == 0)

addr _ high 1++；

}

//Verify data

addr _ high 1 = address _ high；

addr _ low 1 = address _ low；

TH0 = TH0 _ temp = TIMER _ H _ 1us 5； //Set the operation to1.5us.

TL0 = TL0 _ temp = TIMER _ L _ 1us 5；

SFRCN = 0X00// Read data

for(I = 0； I & ltBUF _ SIZEi ++)

{

SF rah = addr _ high 1；

SFRAL = addr _ low 1；

TR0 = 1；

# ifdef ENABLE _ IDLE// test

PCON | = 0x 0 1； //In idle conduction state

#endif

addr _ low 1++；

if(addr_low 1 == 0)

addr _ high 1++；

If (SFRFD! = ringbuf[i])

Returns 0;

}

for(I = 0； I< 128; i++)

{

ringbuf[I]= 0；

}

If (verification is normal)

Returns1;

}

Verb (abbreviation of verb) My ISP VC++ interface:

Encrypt the interface, encrypt the conversion program first.

Programming interface:

Winbond utility: